Apache/2.4.7 (Ubuntu) Linux sman1baleendah 3.13.0-24-generic #46-Ubuntu SMP Thu Apr 10 19:11:08 UTC 2014 x86_64 uid=33(www-data) gid=33(www-data) groups=33(www-data) safemode : OFF MySQL: ON | Perl: ON | cURL: OFF | WGet: ON > / usr / src / linux-headers-3.13.0-24 / arch / xtensa / platforms / xt2000 / include / platform / | server ip : 172.67.156.115 your ip : 172.70.127.226 H O M E |
Filename | /usr/src/linux-headers-3.13.0-24/arch/xtensa/platforms/xt2000/include/platform/serial.h |
Size | 766 |
Permission | rw-r--r-- |
Owner | root : root |
Create time | 27-Apr-2025 09:50 |
Last modified | 20-Jan-2014 10:40 |
Last accessed | 08-Jul-2025 00:02 |
Actions | edit | rename | delete | download (gzip) |
View | text | code | image |
/*
* platform/serial.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2001 Tensilica Inc.
*/
#ifndef _XTENSA_XT2000_SERIAL_H
#define _XTENSA_XT2000_SERIAL_H
#include <variant/core.h>
#include <asm/io.h>
/* National-Semi PC16552D DUART: */
#define DUART16552_1_INTNUM XCHAL_EXTINT4_NUM
#define DUART16552_2_INTNUM XCHAL_EXTINT5_NUM
#define DUART16552_1_ADDR IOADDR(0x0d050020) /* channel 1 */
#define DUART16552_2_ADDR IOADDR(0x0d050000) /* channel 2 */
#define DUART16552_XTAL_FREQ 18432000 /* crystal frequency in Hz */
#define BASE_BAUD ( DUART16552_XTAL_FREQ / 16 )
#endif /* _XTENSA_XT2000_SERIAL_H */
* platform/serial.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2001 Tensilica Inc.
*/
#ifndef _XTENSA_XT2000_SERIAL_H
#define _XTENSA_XT2000_SERIAL_H
#include <variant/core.h>
#include <asm/io.h>
/* National-Semi PC16552D DUART: */
#define DUART16552_1_INTNUM XCHAL_EXTINT4_NUM
#define DUART16552_2_INTNUM XCHAL_EXTINT5_NUM
#define DUART16552_1_ADDR IOADDR(0x0d050020) /* channel 1 */
#define DUART16552_2_ADDR IOADDR(0x0d050000) /* channel 2 */
#define DUART16552_XTAL_FREQ 18432000 /* crystal frequency in Hz */
#define BASE_BAUD ( DUART16552_XTAL_FREQ / 16 )
#endif /* _XTENSA_XT2000_SERIAL_H */