| Apache/2.4.7 (Ubuntu) Linux sman1baleendah 3.13.0-24-generic #46-Ubuntu SMP Thu Apr 10 19:11:08 UTC 2014 x86_64 uid=33(www-data) gid=33(www-data) groups=33(www-data) safemode : OFF MySQL: ON | Perl: ON | cURL: OFF | WGet: ON > / usr / src / linux-headers-3.13.0-24 / arch / mips / include / asm / dec / | server ip : 104.21.89.46 your ip : 172.69.130.147 H O M E |
| Filename | /usr/src/linux-headers-3.13.0-24/arch/mips/include/asm/dec/ioasic.h |
| Size | 862 |
| Permission | rw-r--r-- |
| Owner | root : root |
| Create time | 27-Apr-2025 09:50 |
| Last modified | 20-Jan-2014 10:40 |
| Last accessed | 07-Jul-2025 00:14 |
| Actions | edit | rename | delete | download (gzip) |
| View | text | code | image |
/*
* include/asm-mips/dec/ioasic.h
*
* DEC I/O ASIC access operations.
*
* Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_DEC_IOASIC_H
#define __ASM_DEC_IOASIC_H
#include <linux/spinlock.h>
#include <linux/types.h>
extern spinlock_t ioasic_ssr_lock;
extern volatile u32 *ioasic_base;
static inline void ioasic_write(unsigned int reg, u32 v)
{
ioasic_base[reg / 4] = v;
}
static inline u32 ioasic_read(unsigned int reg)
{
return ioasic_base[reg / 4];
}
extern void init_ioasic_irqs(int base);
extern int dec_ioasic_clocksource_init(void);
#endif /* __ASM_DEC_IOASIC_H */
* include/asm-mips/dec/ioasic.h
*
* DEC I/O ASIC access operations.
*
* Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_DEC_IOASIC_H
#define __ASM_DEC_IOASIC_H
#include <linux/spinlock.h>
#include <linux/types.h>
extern spinlock_t ioasic_ssr_lock;
extern volatile u32 *ioasic_base;
static inline void ioasic_write(unsigned int reg, u32 v)
{
ioasic_base[reg / 4] = v;
}
static inline u32 ioasic_read(unsigned int reg)
{
return ioasic_base[reg / 4];
}
extern void init_ioasic_irqs(int base);
extern int dec_ioasic_clocksource_init(void);
#endif /* __ASM_DEC_IOASIC_H */