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Linux sman1baleendah 3.13.0-24-generic #46-Ubuntu SMP Thu Apr 10 19:11:08 UTC 2014 x86_64
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> / usr / share / mime / text /

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H O M E

Filename	/usr/share/mime/text/x-svsrc.xml
Size	2.67 kb
Permission	rw-r--r--
Owner	root : root
Create time	27-Apr-2025 09:57
Last modified	27-Apr-2025 09:57
Last accessed	06-Jul-2025 02:46
Actions	edit \| rename \| delete \| download (gzip)
View	text \| code \| image

<?xml version="1.0" encoding="utf-8"?>
<mime-type xmlns="http://www.freedesktop.org/standards/shared-mime-info" type="text/x-svsrc">

<comment>SystemVerilog source code</comment>
<comment xml:lang="ast">códigu fonte en SystemVerilog</comment>
<comment xml:lang="bg">Изходен код — SystemVerilog</comment>
<comment xml:lang="bo">SystemVerilog ཐོག་མའི་ཚབ་ཨང</comment>
<comment xml:lang="bs">SystemVerilog izvorni kod</comment>
<comment xml:lang="ca">codi font en SystemVerilog</comment>
<comment xml:lang="cs">Zdrojový kód SystemVerilog</comment>
<comment xml:lang="da">SystemVerilog-kildekode</comment>
<comment xml:lang="de">SystemVerilog-Quellcode</comment>
<comment xml:lang="el">πηγαίος κώδικας SystemVerilog</comment>
<comment xml:lang="en_AU">SystemVerilog source code</comment>
<comment xml:lang="en_GB">SystemVerilog source code</comment>
<comment xml:lang="es">código fuente en SystemVerilog</comment>
<comment xml:lang="eu">SystemVerilog iturburu-kodea</comment>
<comment xml:lang="fi">SystemVerilog-lähdekoodi</comment>
<comment xml:lang="fr">code source</comment>
<comment xml:lang="gl">código fonte en SystemVerilog</comment>
<comment xml:lang="he">קוד מקור של SystemVerilog</comment>
<comment xml:lang="hr">SystemVerilog izvorni kod</comment>
<comment xml:lang="hu">SystemVerilog-forráskód</comment>
<comment xml:lang="id">Kode sumber SystemVerilog</comment>
<comment xml:lang="it">Codice sorgente</comment>
<comment xml:lang="ja">SystemVerilog ソースコード</comment>
<comment xml:lang="kk">SystemVerilog бастапқы коды</comment>
<comment xml:lang="ko">SystemVerilog 소스 코드</comment>
<comment xml:lang="lv">SystemVerilog pirmkods</comment>
<comment xml:lang="nl">SystemVerilog broncode</comment>
<comment xml:lang="pl">Kod źródłowy SystemVerilog</comment>
<comment xml:lang="pt">Código Fonte SystemVerilog</comment>
<comment xml:lang="pt_BR">Código-fonte de SystemVerilog</comment>
<comment xml:lang="ru">исходный код SystemVerilog</comment>
<comment xml:lang="sk">Zdrojový kód SystemVerilog</comment>
<comment xml:lang="sl">Datoteka izvorne kode SystemVerilog</comment>
<comment xml:lang="sv">SystemVerilog-källkod</comment>
<comment xml:lang="tr">SystemVerilog kaynak kodu</comment>
<comment xml:lang="uk">вихідний файл мовою SystemVerilog</comment>
<comment xml:lang="zh_CN">SystemVerilog 源代码</comment>
<comment xml:lang="zh_TW">SystemVerilog 源碼</comment>
<sub-class-of type="text/x-verilog"/>
<glob pattern="*.sv"/>
</mime-type>